Some of this may just be my opinion, but...
The register space of the 68HC12 processor family (0x0 to 0x1ff) is not actually tied to the page0 concept. "page0" refers to the address space (an address which only uses the low 8 bits of the address. The address range in page0 is therefore 0x00 to 0xff. This only has meaning because certain optimizations are only possible if it is assumed that the address is only 8 bits, so it fits in a smaller instruction. Since HC12 has a complete 16-bit bus, this optimization is less significant. I do agree that it could make sens if page0 was only defined to use part of page0 space (such as LENGTH=0x80) since the space included is page0. The problem would arise if any space outside (over 0xff) was trying to act like page 0 space. Even then, I realize nobody might notice unless the compiler/linker was confused by this wild claim.
With HC12, you can still optimize by using page0. One difference is it has by default, hardware registers instead of scratch RAM in page0. In HC11, page0 ram was critical because it had to access fast variables often to work with 16-bit values. Now that HC12 can work with that more in mcu registers, it can further optimize speed by accessing most hardware registers in page0. You noticed the register size exceeds page0, but hopefully the more critical registers made it into the first 256 bytes. Also, since the MCU is meant for working i/o more than doing software calculations, this sounds more optimal anyway.
The purpose of the page0 region in "memory.x" is primarily for a space to place the critical variables in HC11, into the page0 ram. In HC12, it is possible the compiler/linker does not even use it. Since the default ldscript does not place .page0 variables into the page0 region, the region might be unused. I have deleted it and my project still worked, but I decided I should leave it there in case some new or unseen feature does use it later, or until the code manager (Stephane, or whoever works on gnu-m68hc1x) states that it can be removed. Besides, I think it's better to do less work to keep something working than to do more work to risk breaking it.
An important question is how to access those registers, then. If you have been placing their variable names and types into page0, then perhaps it is good enough to simply use a different region name, such as "hwreg", instead of "page0". If you still have the page0 region defined in the same place, it might overlap. You would have to delete the page0 line in "memory.x". The GEL example seems to recommend a more versatile method. Note that it does not even use a memory region for this. It defines a symbol to the linker, with the start addr of registers, called "_io_ports" (see src/libbsp/ports.s). In a C header, this is defined to a type (volatile unsigned char), which can then be accessed as an array. It can also be type cast to (volatile unsigned short) for 16-bit registers. This is the way I am acessing it.
Thanks for the input on this subject. --jeffs
Jefferson Smith imajeffs -- at -- hotmail.com |
